The present application claims priority to Japanese Patent Application 2005-022098 filed on Jan. 28, 2005, the contents of which are hereby incorporated by reference.
There exists a heterojunction semiconductor device being provided with a heterojunction in which a semiconductor layer that has a large band gap is attached to a semiconductor layer that has a small band gap. This type of heterojunction semiconductor device uses a two-dimensional electron gas layer that is developed on a heterojunction interface in order to transfer electrons. The heterojunction semiconductor device can achieve high-speed operation by utilizing the two-dimensional electron gas layer. Among various heterojunction semiconductor devices, the development of a heterojunction semiconductor device that comprises III-V semiconductor layers is especially brisk. Since III-V semiconductors have a large dielectric-breakdown field and a high degree of movement of saturated electrons, III-V semiconductor devices are expected to be able to have high withstand voltage and control large currents. Japanese Laid-Open Patent Application Publication No. 2003-59946, No. 2001-358075, No. 2004-31879, and No. 1999-261053 disclose a heterojunction semiconductor device.
FIG. 13 shows a cross-sectional diagram of a main portion of a heterojunction semiconductor device 200, which is of prior art.
The heterojunction semiconductor device 200 comprises a base plate 222 made of sapphire (Al2O3), a buffer layer 224 made of aluminum nitride (AlN), a lower semiconductor layer 226 made of gallium nitride (GaN), and an upper semiconductor layer 228 made of aluminum gallium nitride (AlGaN). The upper semiconductor layer 228 contains aluminum. A band gap of the upper semiconductor layer 228 is larger than a band gap of the lower semiconductor layer 226. Thickness of the upper semiconductor layer 228 is represented by T1. Thickness T1 is less than or equal to a few hundred nanometers, which is considerably thinner than the other layers. The upper semiconductor layer 228 supplies electrons to a two-dimensional electron gas layer to be formed between the lower semiconductor layer 226 and the upper semiconductor layer 228. A drain electrode 232, a source electrode 234, and a gate electrode 236 are formed on a top surface of the upper semiconductor layer 228, wherein the gate electrode 236 is disposed between the drain electrode 232 and the source electrode 234. In order to withstand a voltage of more than 1 kV, for example, distance W1 between the gate electrode 236 and the drain electrode 232 is set to be greater than or equal to approximately 5 μm. In order to control leakage current between the gate electrode 236 and the source electrode 234, distance W2 between the gate electrode 236 and the source electrode 234 is set to be greater than or equal to approximately 2 μm. Depending on certain properties desired from the heterojunction semiconductor device 200, distance W1 and distance W2 may be different from the above-mentioned values.
In order to operate the heterojunction semiconductor device 200 as normally-off, a method is known to make the lower semiconductor layer 226 a p-type layer. In a condition where there is no gate-on voltage being applied to the gate electrode 236, if the conductivity type of the lower semiconductor layer 226 is p-type, a energy level of a conduction band of a heterojunction between the lower semiconductor layer 226 and the upper semiconductor layer 228 is above a fermi-level. Therefore, in a condition where there is no gate-on voltage being applied to the gate electrode 236, a two-dimensional electron gas layer is not generated at the heterojunction between the lower semiconductor layer 226 and the upper semiconductor layer 228. In a case where the lower semiconductor layer 226 is p-type, the heterojunction semiconductor device 200 can operate as normally-off.
Further, in order to operate the heterojunction semiconductor device 200 as normally-off, a method is known to make thickness T1 of the upper semiconductor layer 228 significantly thin. Specifically, thickness T1 of the upper semiconductor layer 228 is made to be approximately 10 nm or less. In a condition where there is no gate-on voltage being applied to the gate electrode 236, if thickness T1 of the upper semiconductor layer 228 is thin, a two-dimensional electron gas layer is not generated at the heterojunction between the lower semiconductor layer 226 and the upper semiconductor layer 228. When thickness T1 of the upper semiconductor layer 228 is thin, the heterojunction semiconductor device 200 can operate as normally-off.
In order to operate as normally-off, other methods exist besides the above-mentioned methods. With this type of the heterojunction semiconductor device 200, however, even if other methods are used, the upper semiconductor layer 228 must still be provided to supply electrons to the two-dimensional electron gas layer. In general, thickness T1 of the upper semiconductor layer 228 is made to be nanometers thick. On the other hand, distance W1 between the gate electrode 236 and the drain electrode 232, and distance W2 between the gate electrode 236 and the source electrode 234 are formed to be within a few micrometers to a few hundred micrometers. When a gate-on voltage is applied to the gate electrode 236, a two-dimensional electron gas layer can be generated in an area where the gate electrode 236 is positioned. However, a two-dimensional electron gas layer may not be generated between the gate electrode 236 and the drain electrode 232, and between the gate electrode 236 and the source electrode 234. When this occurs, the two-dimensional electron gas layer does not extend between the drain electrode 232 and the source electrode 234. In this situation, even if a gate-on voltage is applied to the gate electrode 236, the heterojunction semiconductor devise 200 will not turn on.
It is difficult to design a heterojunction semiconductor devise 200 that has large distances of W1 and W2 for obtaining a high withstand voltage and will turn on by applying voltage to the gate electrode 236.
An objective of the present invention is to provide a heterojunction semiconductor device that stably turns on with a gate-on voltage and has a high withstand voltage.